diff options
| -rw-r--r-- | package/uboot-omap35xx/Makefile | 89 | ||||
| -rw-r--r-- | package/uboot-omap35xx/files/include/configs/omap3_overo.h | 316 | 
2 files changed, 405 insertions, 0 deletions
diff --git a/package/uboot-omap35xx/Makefile b/package/uboot-omap35xx/Makefile new file mode 100644 index 000000000..928acc7d4 --- /dev/null +++ b/package/uboot-omap35xx/Makefile @@ -0,0 +1,89 @@ +# +# Copyright (C) 2011 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=u-boot +PKG_VERSION:=2010.12 +PKG_RELEASE:=1 + +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION) +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot +PKG_MD5SUM:= +PKG_TARGETS:=bin + +include $(INCLUDE_DIR)/package.mk + +define uboot/Default +  TITLE:= +  CONFIG:= +  IMAGE:= +endef + +define uboot/omap3_overo +  TITLE:=U-boot for the gumstix board +endef + +UBOOTS:=omap3_overo + +define Package/uboot/template +define Package/uboot-omap35xx-$(1) +  SECTION:=boot +  CATEGORY:=Boot Loaders +  DEPENDS:=@TARGET_omap35xx +  TITLE:=$(2) +  URL:=http://www.denx.de/wiki/U-Boot +  VARIANT:=$(1) +endef +endef + +define BuildUbootPackage +	$(eval $(uboot/Default)) +	$(eval $(uboot/$(1))) +	$(call Package/uboot/template,$(1),$(TITLE)) +endef + + +ifdef BUILD_VARIANT +$(eval $(call uboot/$(BUILD_VARIANT))) +UBOOT_CONFIG:=$(if $(CONFIG),$(CONFIG),$(BUILD_VARIANT)) +UBOOT_IMAGE:=$(if $(IMAGE),$(IMAGE),openwrt-$(BOARD)-$(BUILD_VARIANT)-u-boot.bin) +endif + +define Build/Prepare +	$(call Build/Prepare/Default) +	$(CP) ./files/* $(PKG_BUILD_DIR) +	find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf +endef + +define Build/Configure +	$(MAKE) -C $(PKG_BUILD_DIR) \ +		$(UBOOT_CONFIG)_config +endef + +define Build/Compile +	$(MAKE) -C $(PKG_BUILD_DIR) \ +		CROSS_COMPILE=$(TARGET_CROSS) +endef + +define Package/uboot/install/template +define Package/uboot-omap35xx-$(1)/install +	$(INSTALL_DIR) $$(1) +	$(CP) $(PKG_BUILD_DIR)/u-boot.bin $(BIN_DIR)/$(2) +endef +endef + +$(foreach u,$(UBOOTS), \ +	$(eval $(call Package/uboot/install/template,$(u),openwrt-$(BOARD)-$(u)-u-boot.bin)) \ +) + +$(foreach u,$(UBOOTS), \ +	$(eval $(call BuildUbootPackage,$(u))) \ +	$(eval $(call BuildPackage,uboot-omap35xx-$(u))) \ +) diff --git a/package/uboot-omap35xx/files/include/configs/omap3_overo.h b/package/uboot-omap35xx/files/include/configs/omap3_overo.h new file mode 100644 index 000000000..1faafc564 --- /dev/null +++ b/package/uboot-omap35xx/files/include/configs/omap3_overo.h @@ -0,0 +1,316 @@ +/* + * Configuration settings for the Gumstix Overo board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */ +#define CONFIG_OMAP		1	/* in a TI OMAP core */ +#define CONFIG_OMAP34XX		1	/* which is a 34XX */ +#define CONFIG_OMAP3430		1	/* which is in a 3430 */ +#define CONFIG_OMAP3_OVERO	1	/* working with overo */ + +#define CONFIG_SDRC	/* The chip has SDRC controller */ + +#include <asm/arch/cpu.h>	/* get chip and board defs */ +#include <asm/arch/omap3.h> + +/* + * Display CPU and Board information + */ +#define CONFIG_DISPLAY_CPUINFO		1 +#define CONFIG_DISPLAY_BOARDINFO	1 + +/* Clock Defines */ +#define V_OSCK			26000000	/* Clock output from T2 */ +#define V_SCLK			(V_OSCK >> 1) + +#undef CONFIG_USE_IRQ		/* no support for IRQs */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS	1 +#define CONFIG_INITRD_TAG		1 +#define CONFIG_REVISION_TAG		1 + +/* + * Size of malloc() pool + */ +#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */ +						/* Sector */ +#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10)) +						/* initial data */ + +/* + * Hardware drivers + */ + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */ + +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE	(-4) +#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK + +/* + * select serial console configuration + */ +#define CONFIG_CONS_INDEX		3 +#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3 +#define CONFIG_SERIAL3			3 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_BAUDRATE			115200 +#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \ +					115200} +#define CONFIG_GENERIC_MMC		1 +#define CONFIG_MMC			1 +#define CONFIG_OMAP_HSMMC		1 +#define CONFIG_DOS_PARTITION		1 + +/* DDR - I use Micron DDR */ +#define CONFIG_OMAP3_MICRON_DDR		1 + +/* commands to include */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2		/* EXT2 Support			*/ +#define CONFIG_CMD_FAT		/* FAT support			*/ +#define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/ + +#define CONFIG_CMD_I2C		/* I2C serial bus support	*/ +#define CONFIG_CMD_MMC		/* MMC support			*/ +#define CONFIG_CMD_NAND		/* NAND support			*/ + +#undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/ +#undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/ +#undef CONFIG_CMD_IMI		/* iminfo			*/ +#undef CONFIG_CMD_IMLS		/* List all found images	*/ +#undef CONFIG_CMD_NFS		/* NFS support			*/ +#define CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/ + +#define CONFIG_SYS_NO_FLASH +#define CONFIG_HARD_I2C			1 +#define CONFIG_SYS_I2C_SPEED		100000 +#define CONFIG_SYS_I2C_SLAVE		1 +#define CONFIG_SYS_I2C_BUS		0 +#define CONFIG_SYS_I2C_BUS_SELECT	1 +#define CONFIG_I2C_MULTI_BUS		1 +#define CONFIG_DRIVER_OMAP34XX_I2C	1 + +/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER		1 +#define CONFIG_TWL4030_LED		1 + +/* + * Board NAND Info. + */ +#define CONFIG_SYS_NAND_QUIET_TEST	1 +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */ +							/* to access nand */ +#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */ +							/* to access nand */ +							/* at CS0 */ +#define GPMC_NAND_ECC_LP_x16_LAYOUT	1 + +#define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */ +						/* devices */ +#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV		"nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET	0x680000 +#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */ +							/* partition */ + +/* Environment information */ +#define CONFIG_BOOTDELAY		5 + +#define CONFIG_EXTRA_ENV_SETTINGS \ +	"loadaddr=0x82000000\0" \ +	"console=ttyS2,115200n8\0" \ +	"mpurate=500\0" \ +	"vram=12M\0" \ +	"dvimode=1024x768MR-16@60\0" \ +	"defaultdisplay=dvi\0" \ +	"mmcdev=0\0" \ +	"mmcroot=/dev/mmcblk0p2 rw\0" \ +	"mmcrootfstype=ext3 rootwait\0" \ +	"nandroot='ubi0:rootfs ubi.mtd=4'\0" \ +	"nandrootfstype=ubifs\0" \ +	"mmcargs=setenv bootargs console=${console} " \ +		"mpurate=${mpurate} " \ +		"vram=${vram} " \ +		"omapfb.mode=dvi:${dvimode} " \ +		"omapfb.debug=y " \ +		"omapdss.def_disp=${defaultdisplay} " \ +		"root=${mmcroot} " \ +		"rootfstype=${mmcrootfstype}\0" \ +	"nandargs=setenv bootargs console=${console} " \ +		"mpurate=${mpurate} " \ +		"vram=${vram} " \ +		"omapfb.mode=dvi:${dvimode} " \ +		"omapfb.debug=y " \ +		"omapdss.def_disp=${defaultdisplay} " \ +		"root=${nandroot} " \ +		"rootfstype=${nandrootfstype}\0" \ +	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ +	"bootscript=echo Running bootscript from mmc ...; " \ +		"source ${loadaddr}\0" \ +	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ +	"mmcboot=echo Booting from mmc ...; " \ +		"run mmcargs; " \ +		"bootm ${loadaddr}\0" \ +	"nandboot=echo Booting from nand ...; " \ +		"run nandargs; " \ +		"nand read ${loadaddr} 280000 400000; " \ +		"bootm ${loadaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ +	"if mmc rescan ${mmcdev}; then " \ +		"if run loadbootscript; then " \ +			"run bootscript; " \ +		"else " \ +			"if run loaduimage; then " \ +				"run mmcboot; " \ +			"else run nandboot; " \ +			"fi; " \ +		"fi; " \ +	"else run nandboot; fi" + +#define CONFIG_AUTO_COMPLETE	1 +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP		/* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2	"> " +#define CONFIG_SYS_PROMPT		"Overo # " +#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \ +					sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS		16	/* max number of command */ +						/* args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0) +#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \ +					0x01F00000) /* 31MB */ + +#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */ +								/* address */ +/* + * OMAP3 has 12 GP timers, they can be driven by the system clock + * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). + * This rate is divided by a local divisor. + */ +#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2 +#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ			1000 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */ +#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */ +#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0 +#define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */ +#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1 + +/* SDRAM Bank Allocation method */ +#define SDRC_R_B_C		1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +/* **** PISMO SUPPORT *** */ + +/* Configure the PISMO */ +#define PISMO1_NAND_SIZE		GPMC_SIZE_128M +#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M + +#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */ + +#define CONFIG_SYS_FLASH_BASE		boot_flash_base + +/* Monitor at start of flash */ +#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP + +#define CONFIG_ENV_IS_IN_NAND		1 +#define ONENAND_ENV_OFFSET		0x240000 /* environment starts here */ +#define SMNAND_ENV_OFFSET		0x240000 /* environment starts here */ + +#define CONFIG_SYS_ENV_SECT_SIZE	boot_flash_sec +#define CONFIG_ENV_OFFSET		boot_flash_off +#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET + +#ifndef __ASSEMBLY__ +extern unsigned int boot_flash_base; +extern volatile unsigned int boot_flash_env_addr; +extern unsigned int boot_flash_off; +extern unsigned int boot_flash_sec; +extern unsigned int boot_flash_type; +#endif + +#if defined(CONFIG_CMD_NET) +/*---------------------------------------------------------------------------- + * SMSC9211 Ethernet from SMSC9118 family + *---------------------------------------------------------------------------- + */ + +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X		1 +#define CONFIG_SMC911X_32_BIT +#define CONFIG_SMC911X_BASE     0x2C000000 + +#endif /* (CONFIG_CMD_NET) */ + +#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800 +#define CONFIG_SYS_INIT_RAM_SIZE	0x800 +#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \ +					 CONFIG_SYS_INIT_RAM_SIZE - \ +					 GENERATED_GBL_DATA_SIZE) + +#endif				/* __CONFIG_H */  | 
