remove the brcm-2.4 target, it will no longer be supported in future releases. please use brcm47xx with broadcom-wl instead

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@21946 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 0 insertions, 45 deletions

diff --git a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/hndmips.h b/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/hndmips.h
deleted file mode 100644
index c6051ec17..000000000
--- a/target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/hndmips.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * HND SiliconBackplane MIPS core software interface.
- *
- * Copyright 2007, Broadcom Corporation
- * All Rights Reserved.
- * 
- * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
- * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
- * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
- *
- */
-
-#ifndef _hndmips_h_
-#define _hndmips_h_
-
-extern void sb_mips_init(sb_t *sbh, uint shirq_map_base);
-extern bool sb_mips_setclock(sb_t *sbh, uint32 mipsclock, uint32 sbclock, uint32 pciclock);
-extern void enable_pfc(uint32 mode);
-extern uint32 sb_memc_get_ncdl(sb_t *sbh);
-
-#if defined(BCMPERFSTATS)
-/* enable counting - exclusive version. Only one set of counters allowed at a time */
-extern void hndmips_perf_cyclecount_enable(void);
-extern void hndmips_perf_instrcount_enable(void);
-extern void hndmips_perf_icachecount_enable(void);
-extern void hndmips_perf_dcachecount_enable(void);
-/* start and stop counting */
-#define hndmips_perf_start01() \
-	MTC0(C0_PERFORMANCE, 4, MFC0(C0_PERFORMANCE, 4) | 0x80008000)
-#define hndmips_perf_stop01() \
-	MTC0(C0_PERFORMANCE, 4, MFC0(C0_PERFORMANCE, 4) & ~0x80008000)
-/* retrieve coutners - counters *decrement* */
-#define hndmips_perf_read0() -(long)(MFC0(C0_PERFORMANCE, 0))
-#define hndmips_perf_read1() -(long)(MFC0(C0_PERFORMANCE, 1))
-#define hndmips_perf_read2() -(long)(MFC0(C0_PERFORMANCE, 2))
-/* enable counting - modular version. Each counters can be enabled separately. */
-extern void hndmips_perf_icache_hit_enable(void);
-extern void hndmips_perf_icache_miss_enable(void);
-extern uint32 hndmips_perf_read_instrcount(void);
-extern uint32 hndmips_perf_read_cache_miss(void);
-extern uint32 hndmips_perf_read_cache_hit(void);
-#endif 
-
-#endif /* _hndmips_h_ */