[adm5120] change switch register access macros

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9962 3c298f89-4303-0410-b956-a3cf2f4a3e73

3 files changed, 28 insertions, 28 deletions

diff --git a/target/linux/adm5120/files/drivers/char/watchdog/adm5120_wdt.c b/target/linux/adm5120/files/drivers/char/watchdog/adm5120_wdt.c
index 982fe39c4..2439fbc7f 100644
--- a/target/linux/adm5120/files/drivers/char/watchdog/adm5120_wdt.c
+++ b/target/linux/adm5120/files/drivers/char/watchdog/adm5120_wdt.c
@@ -1,5 +1,5 @@
 /*
- *	ADM5120_WDT 0.01: Infineon ADM5120 SoC watchdog driver 
+ *	ADM5120_WDT 0.01: Infineon ADM5120 SoC watchdog driver
  *	Copyright (c) Ondrej Zajicek <santiago@crfreenet.org>, 2007
  *
  *	based on
@@ -47,26 +47,26 @@ MODULE_LICENSE("GPL");
 static inline void wdt_set_timeout(void)
 {
 	u32 val = (1 << 31) | (((timeout * 100) & 0x7FFF) << 16);
-	SW_WRITE_REG(WDOG0, val);
+	SW_WRITE_REG(SWITCH_REG_WDOG0, val);
 }
 
-/* 
+/*
    It looks like WDOG0-register-write don't modify counter,
    but WDOG0-register-read resets counter.
 */
 
 static inline void wdt_reset_counter(void)
 {
-	SW_READ_REG(WDOG0);
+	SW_READ_REG(SWITCH_REG_WDOG0);
 }
 
 static inline void wdt_disable(void)
 {
-	SW_WRITE_REG(WDOG0, 0x7FFF0000);
+	SW_WRITE_REG(SWITCH_REG_WDOG0, 0x7FFF0000);
 }
 
 
- 
+
 static int wdt_open(struct inode *inode, struct file *file)
 {
 	/* Allow only one person to hold it open */
diff --git a/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c b/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
index 824d2f5e8..b84492f46 100644
--- a/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
+++ b/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
@@ -261,7 +261,7 @@ static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
 
 	if (info->amap.window_size == 0) {
 		/* get memory window size */
-		t = SW_READ_REG(MEMCTRL) >> fdesc->srs_shift;
+		t = SW_READ_REG(SWITCH_REG_MEMCTRL) >> fdesc->srs_shift;
 		t &= MEMCTRL_SRS_MASK;
 		info->amap.window_size = flash_sizes[t];
 	}
diff --git a/target/linux/adm5120/files/drivers/net/adm5120sw.c b/target/linux/adm5120/files/drivers/net/adm5120sw.c
index f87684406..c8c3f1d5b 100644
--- a/target/linux/adm5120/files/drivers/net/adm5120sw.c
+++ b/target/linux/adm5120/files/drivers/net/adm5120sw.c
@@ -280,56 +280,56 @@ static void sw_dump_regs(void)
 {
 	u32 t;
 
-	t = SW_READ_REG(PHY_STATUS);
+	t = sw_read_reg(SWITCH_REG_PHY_STATUS);
 	SW_DBG("phy_status: %08X\n", t);
 
-	t = SW_READ_REG(CPUP_CONF);
+	t = sw_read_reg(SWITCH_REG_CPUP_CONF);
 	SW_DBG("cpup_conf: %08X%s%s%s\n", t,
 		(t & CPUP_CONF_DCPUP) ? " DCPUP" : "",
 		(t & CPUP_CONF_CRCP) ? " CRCP" : "",
 		(t & CPUP_CONF_BTM) ? " BTM" : "");
 
-	t = SW_READ_REG(PORT_CONF0);
+	t = sw_read_reg(SWITCH_REG_PORT_CONF0);
 	SW_DBG("port_conf0: %08X\n", t);
-	t = SW_READ_REG(PORT_CONF1);
+	t = sw_read_reg(SWITCH_REG_PORT_CONF1);
 	SW_DBG("port_conf1: %08X\n", t);
-	t = SW_READ_REG(PORT_CONF2);
+	t = sw_read_reg(SWITCH_REG_PORT_CONF2);
 	SW_DBG("port_conf2: %08X\n", t);
 
-	t = SW_READ_REG(VLAN_G1);
+	t = sw_read_reg(SWITCH_REG_VLAN_G1);
 	SW_DBG("vlan g1: %08X\n", t);
-	t = SW_READ_REG(VLAN_G2);
+	t = sw_read_reg(SWITCH_REG_VLAN_G2);
 	SW_DBG("vlan g2: %08X\n", t);
 
-	t = SW_READ_REG(BW_CNTL0);
+	t = sw_read_reg(SWITCH_REG_BW_CNTL0);
 	SW_DBG("bw_cntl0: %08X\n", t);
-	t = SW_READ_REG(BW_CNTL1);
+	t = sw_read_reg(SWITCH_REG_BW_CNTL1);
 	SW_DBG("bw_cntl1: %08X\n", t);
 
-	t = SW_READ_REG(PHY_CNTL0);
+	t = sw_read_reg(SWITCH_REG_PHY_CNTL0);
 	SW_DBG("phy_cntl0: %08X\n", t);
-	t = SW_READ_REG(PHY_CNTL1);
+	t = sw_read_reg(SWITCH_REG_PHY_CNTL1);
 	SW_DBG("phy_cntl1: %08X\n", t);
-	t = SW_READ_REG(PHY_CNTL2);
+	t = sw_read_reg(SWITCH_REG_PHY_CNTL2);
 	SW_DBG("phy_cntl2: %08X\n", t);
-	t = SW_READ_REG(PHY_CNTL3);
+	t = sw_read_reg(SWITCH_REG_PHY_CNTL3);
 	SW_DBG("phy_cntl3: %08X\n", t);
-	t = SW_READ_REG(PHY_CNTL4);
+	t = sw_read_reg(SWITCH_REG_PHY_CNTL4);
 	SW_DBG("phy_cntl4: %08X\n", t);
 
-	t = SW_READ_REG(INT_STATUS);
+	t = sw_read_reg(SWITCH_REG_INT_STATUS);
 	sw_dump_intr_mask("int_status: ", t);
 
-	t = SW_READ_REG(INT_MASK);
+	t = sw_read_reg(SWITCH_REG_INT_MASK);
 	sw_dump_intr_mask("int_mask: ", t);
 
-	t = SW_READ_REG(SHDA);
+	t = sw_read_reg(SWITCH_REG_SHDA);
 	SW_DBG("shda: %08X\n", t);
-	t = SW_READ_REG(SLDA);
+	t = sw_read_reg(SWITCH_REG_SLDA);
 	SW_DBG("slda: %08X\n", t);
-	t = SW_READ_REG(RHDA);
+	t = sw_read_reg(SWITCH_REG_RHDA);
 	SW_DBG("rhda: %08X\n", t);
-	t = SW_READ_REG(RLDA);
+	t = sw_read_reg(SWITCH_REG_RLDA);
 	SW_DBG("rlda: %08X\n", t);
 }
 
@@ -1061,7 +1061,7 @@ static int __init adm5120_switch_probe(struct platform_device *pdev)
 		(SWITCH_PORTS_PHY << PHY_CNTL2_PHYR_SHIFT) |
 		(SWITCH_PORTS_PHY << PHY_CNTL2_AMDIX_SHIFT) |
 		PHY_CNTL2_RMAE;
-	SW_WRITE_REG(PHY_CNTL2, t);
+	sw_write_reg(SWITCH_REG_PHY_CNTL2, t);
 
 	t = sw_read_reg(SWITCH_REG_PHY_CNTL3);
 	t |= PHY_CNTL3_RNT;