From abd4dffa20cfa1cc98a7a91fd387ef74b63819bd Mon Sep 17 00:00:00 2001 From: blogic Date: Sat, 22 Dec 2007 14:03:37 +0000 Subject: more danube 2 ifxmips transitions git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9830 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../files/include/asm-mips/danube/danube_irq.h | 66 ---------------------- 1 file changed, 66 deletions(-) delete mode 100644 target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h (limited to 'target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h') diff --git a/target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h b/target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h deleted file mode 100644 index b96d09182..000000000 --- a/target/linux/ifxmips/files/include/asm-mips/danube/danube_irq.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) 2005 infineon - * Copyright (C) 2007 John Crispin - * - */ -#ifndef _IFXMIPS_IRQ__ -#define _IFXMIPS_IRQ__ - -#define INT_NUM_IRQ0 8 -#define INT_NUM_IM0_IRL0 (INT_NUM_IRQ0 + 0) -#define INT_NUM_IM1_IRL0 (INT_NUM_IRQ0 + 32) -#define INT_NUM_IM2_IRL0 (INT_NUM_IRQ0 + 64) -#define INT_NUM_IM3_IRL0 (INT_NUM_IRQ0 + 96) -#define INT_NUM_IM4_IRL0 (INT_NUM_IRQ0 + 128) -#define INT_NUM_IM_OFFSET (INT_NUM_IM1_IRL0 - INT_NUM_IM0_IRL0) - -#define IFXMIPSASC1_TIR (INT_NUM_IM3_IRL0 + 7) -#define IFXMIPSASC1_RIR (INT_NUM_IM3_IRL0 + 9) -#define IFXMIPSASC1_EIR (INT_NUM_IM3_IRL0 + 10) - -#define IFXMIPS_SSC_TIR (INT_NUM_IM0_IRL0 + 15) -#define IFXMIPS_SSC_RIR (INT_NUM_IM0_IRL0 + 14) -#define IFXMIPS_SSC_EIR (INT_NUM_IM0_IRL0 + 16) - -#define IFXMIPS_TIMER6_INT (INT_NUM_IM1_IRL0 + 23) - -#define MIPS_CPU_TIMER_IRQ 7 - -#define IFXMIPS_DMA_CH0_INT (INT_NUM_IM2_IRL0) -#define IFXMIPS_DMA_CH1_INT (INT_NUM_IM2_IRL0 + 1) -#define IFXMIPS_DMA_CH2_INT (INT_NUM_IM2_IRL0 + 2) -#define IFXMIPS_DMA_CH3_INT (INT_NUM_IM2_IRL0 + 3) -#define IFXMIPS_DMA_CH4_INT (INT_NUM_IM2_IRL0 + 4) -#define IFXMIPS_DMA_CH5_INT (INT_NUM_IM2_IRL0 + 5) -#define IFXMIPS_DMA_CH6_INT (INT_NUM_IM2_IRL0 + 6) -#define IFXMIPS_DMA_CH7_INT (INT_NUM_IM2_IRL0 + 7) -#define IFXMIPS_DMA_CH8_INT (INT_NUM_IM2_IRL0 + 8) -#define IFXMIPS_DMA_CH9_INT (INT_NUM_IM2_IRL0 + 9) -#define IFXMIPS_DMA_CH10_INT (INT_NUM_IM2_IRL0 + 10) -#define IFXMIPS_DMA_CH11_INT (INT_NUM_IM2_IRL0 + 11) -#define IFXMIPS_DMA_CH12_INT (INT_NUM_IM2_IRL0 + 25) -#define IFXMIPS_DMA_CH13_INT (INT_NUM_IM2_IRL0 + 26) -#define IFXMIPS_DMA_CH14_INT (INT_NUM_IM2_IRL0 + 27) -#define IFXMIPS_DMA_CH15_INT (INT_NUM_IM2_IRL0 + 28) -#define IFXMIPS_DMA_CH16_INT (INT_NUM_IM2_IRL0 + 29) -#define IFXMIPS_DMA_CH17_INT (INT_NUM_IM2_IRL0 + 30) -#define IFXMIPS_DMA_CH18_INT (INT_NUM_IM2_IRL0 + 16) -#define IFXMIPS_DMA_CH19_INT (INT_NUM_IM2_IRL0 + 21) - -extern void mask_and_ack_ifxmips_irq (unsigned int irq_nr); - -#endif -- cgit v1.2.3