diff options
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ar71xx/config-3.3 | 1 | ||||
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c | 131 | ||||
| -rw-r--r-- | target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch | 39 | 
3 files changed, 171 insertions, 0 deletions
| diff --git a/target/linux/ar71xx/config-3.3 b/target/linux/ar71xx/config-3.3 index ec12afdfd..45e589ede 100644 --- a/target/linux/ar71xx/config-3.3 +++ b/target/linux/ar71xx/config-3.3 @@ -30,6 +30,7 @@ CONFIG_ATH79_MACH_AP81=y  CONFIG_ATH79_MACH_AP83=y  CONFIG_ATH79_MACH_AP96=y  CONFIG_ATH79_MACH_AW_NR580=y +CONFIG_ATH79_MACH_CAP4200AG=y  CONFIG_ATH79_MACH_DB120=y  CONFIG_ATH79_MACH_DIR_600_A1=y  CONFIG_ATH79_MACH_DIR_615_C1=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c new file mode 100644 index 000000000..18944c40f --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c @@ -0,0 +1,131 @@ +/* + *  Senao CAP4200AG board support + * + *  Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> + * + *  This program is free software; you can redistribute it and/or modify it + *  under the terms of the GNU General Public License version 2 as published + *  by the Free Software Foundation. + */ + +#include <linux/pci.h> +#include <linux/phy.h> +#include <linux/platform_device.h> +#include <linux/ath9k_platform.h> + +#include <asm/mach-ath79/ar71xx_regs.h> + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define CAP4200AG_GPIO_LED_PWR_GREEN	12 +#define CAP4200AG_GPIO_LED_PWR_AMBER	13 +#define CAP4200AG_GPIO_LED_LAN_GREEN	14 +#define CAP4200AG_GPIO_LED_LAN_AMBER	15 +#define CAP4200AG_GPIO_LED_WLAN_GREEN	18 +#define CAP4200AG_GPIO_LED_WLAN_AMBER	19 + +#define CAP4200AG_GPIO_BTN_RESET	17 + +#define CAP4200AG_KEYS_POLL_INTERVAL	20	/* msecs */ +#define CAP4200AG_KEYS_DEBOUNCE_INTERVAL (3 * CAP4200AG_KEYS_POLL_INTERVAL) + +#define CAP4200AG_MAC_OFFSET		0 +#define CAP4200AG_WMAC_CALDATA_OFFSET	0x1000 +#define CAP4200AG_PCIE_CALDATA_OFFSET	0x5000 + +static struct gpio_led cap4200ag_leds_gpio[] __initdata = { +	{ +		.name		= "senao:green:pwr", +		.gpio		= CAP4200AG_GPIO_LED_PWR_GREEN, +		.active_low	= 1, +	}, +	{ +		.name		= "senao:amber:pwr", +		.gpio		= CAP4200AG_GPIO_LED_PWR_AMBER, +		.active_low	= 1, +	}, +	{ +		.name		= "senao:green:lan", +		.gpio		= CAP4200AG_GPIO_LED_LAN_GREEN, +		.active_low	= 1, +	}, +	{ +		.name		= "senao:amber:lan", +		.gpio		= CAP4200AG_GPIO_LED_LAN_AMBER, +		.active_low	= 1, +	}, +	{ +		.name		= "senao:green:wlan", +		.gpio		= CAP4200AG_GPIO_LED_WLAN_GREEN, +		.active_low	= 1, +	}, +	{ +		.name		= "senao:amber:wlan", +		.gpio		= CAP4200AG_GPIO_LED_WLAN_AMBER, +		.active_low	= 1, +	}, +}; + +static struct gpio_keys_button cap4200ag_gpio_keys[] __initdata = { +	{ +		.desc		= "Reset button", +		.type		= EV_KEY, +		.code		= KEY_RESTART, +		.debounce_interval = CAP4200AG_KEYS_DEBOUNCE_INTERVAL, +		.gpio		= CAP4200AG_GPIO_BTN_RESET, +		.active_low	= 1, +	}, +}; + +static void __init cap4200ag_setup(void) +{ +	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); +	u8 mac[6]; + +	ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_GREEN, +				 AR934X_GPIO_OUT_GPIO); +	ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_AMBER, +				 AR934X_GPIO_OUT_GPIO); + +	ath79_register_m25p80(NULL); + +	ath79_register_leds_gpio(-1, ARRAY_SIZE(cap4200ag_leds_gpio), +				 cap4200ag_leds_gpio); +	ath79_register_gpio_keys_polled(-1, CAP4200AG_KEYS_POLL_INTERVAL, +					ARRAY_SIZE(cap4200ag_gpio_keys), +					cap4200ag_gpio_keys); + +	ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -1); +	ath79_wmac_disable_2ghz(); +	ath79_register_wmac(art + CAP4200AG_WMAC_CALDATA_OFFSET, mac); + +	ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -2); +	ap91_pci_init(art + CAP4200AG_PCIE_CALDATA_OFFSET, mac); + +	ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | +				   AR934X_ETH_CFG_SW_ONLY_MODE); + +	ath79_register_mdio(0, 0x0); + +	ath79_init_mac(ath79_eth0_data.mac_addr, +		       art + CAP4200AG_MAC_OFFSET, -2); + +	/* GMAC0 is connected to an external PHY */ +	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; +	ath79_eth0_data.phy_mask = BIT(0); +	ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; +	ath79_eth0_pll_data.pll_1000 = 0x06000000; +	ath79_register_eth(0); +} + +MIPS_MACHINE(ATH79_MACH_CAP4200AG, "CAP4200AG", "Senao CAP4200AG", +	     cap4200ag_setup); diff --git a/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch b/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch new file mode 100644 index 000000000..39cef42a5 --- /dev/null +++ b/target/linux/ar71xx/patches-3.3/611-MIPS-ath79-CAP4200AG-support.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -403,6 +403,16 @@ config ATH79_MACH_RW2458N + 	select ATH79_DEV_M25P80 + 	select ATH79_DEV_USB +  ++config ATH79_MACH_CAP4200AG ++	bool "Senao CAP4200AG support" ++	select SOC_AR934X ++	select ATH79_DEV_AP9X_PCI if PCI ++	select ATH79_DEV_ETH ++	select ATH79_DEV_GPIO_BUTTONS ++	select ATH79_DEV_LEDS_GPIO ++	select ATH79_DEV_M25P80 ++	select ATH79_DEV_WMAC ++ + config ATH79_MACH_EAP7660D + 	bool "Senao EAP7660D support" + 	select SOC_AR71XX +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -29,6 +29,7 @@ enum ath79_mach_type { + 	ATH79_MACH_AP83,		/* Atheros AP83 */ + 	ATH79_MACH_AP96,		/* Atheros AP96 */ + 	ATH79_MACH_AW_NR580,		/* AzureWave AW-NR580 */ ++	ATH79_MACH_CAP4200AG,		/* Senao CAP4200AG */ + 	ATH79_MACH_DB120,		/* Atheros DB120 reference board */ + 	ATH79_MACH_PB44,		/* Atheros PB44 reference board */ + 	ATH79_MACH_DIR_600_A1,		/* D-Link DIR-600 rev. A1 */ +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -49,6 +49,7 @@ obj-$(CONFIG_ATH79_MACH_AP81)		+= mach-a + obj-$(CONFIG_ATH79_MACH_AP83)		+= mach-ap83.o + obj-$(CONFIG_ATH79_MACH_AP96)		+= mach-ap96.o + obj-$(CONFIG_ATH79_MACH_AW_NR580)	+= mach-aw-nr580.o ++obj-$(CONFIG_ATH79_MACH_CAP4200AG)	+= mach-cap4200ag.o + obj-$(CONFIG_ATH79_MACH_DB120)		+= mach-db120.o + obj-$(CONFIG_ATH79_MACH_DIR_600_A1)	+= mach-dir-600-a1.o + obj-$(CONFIG_ATH79_MACH_DIR_615_C1)	+= mach-dir-615-c1.o | 
