diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-11 19:05:57 +0000 | 
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-11 19:05:57 +0000 | 
| commit | 2886c1d472a985a22f4f15f27e8acbf2439919dd (patch) | |
| tree | a83f0324a52210ebb6de578b36ba93ba64197b60 /target/linux/ramips/files/arch | |
| parent | 5a2708d1926dfdbbe91f5d12fab43eff55ea971f (diff) | |
ramips: rt305x: rename SYSTEM_CONFIG_* defines to RT305X_SYSCFG_*
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30889 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/files/arch')
3 files changed, 14 insertions, 14 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index 64918fe4d..1ba553555 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -61,15 +61,15 @@  #define CHIP_ID_ID_SHIFT	8  #define CHIP_ID_REV_MASK	0xff -#define SYSTEM_CONFIG_CPUCLK_SHIFT	18 -#define SYSTEM_CONFIG_CPUCLK_MASK	0x1 -#define SYSTEM_CONFIG_CPUCLK_320	0x0 -#define SYSTEM_CONFIG_CPUCLK_384	0x1 -#define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT	2 -#define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK	0x3 -#define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL	0 -#define SYSTEM_CONFIG_SRAM_CS0_MODE_WDT		1 -#define SYSTEM_CONFIG_SRAM_CS0_MODE_BTCOEX	2 +#define RT305X_SYSCFG_CPUCLK_SHIFT	18 +#define RT305X_SYSCFG_CPUCLK_MASK	0x1 +#define RT305X_SYSCFG_CPUCLK_LOW	0x0 +#define RT305X_SYSCFG_CPUCLK_HIGH	0x1 +#define RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT	2 +#define RT305X_SYSCFG_SRAM_CS0_MODE_MASK	0x3 +#define RT305X_SYSCFG_SRAM_CS0_MODE_NORMAL	0 +#define RT305X_SYSCFG_SRAM_CS0_MODE_WDT		1 +#define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX	2  #define RT305X_GPIO_MODE_I2C		BIT(0)  #define RT305X_GPIO_MODE_SPI		BIT(1) diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c index dff3738d3..522bb4463 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c @@ -33,13 +33,13 @@ void __init rt305x_clocks_init(void)  	u32	t;  	t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG); -	t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); +	t = ((t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK);  	switch (t) { -	case SYSTEM_CONFIG_CPUCLK_320: +	case RT305X_SYSCFG_CPUCLK_LOW:  		rt305x_cpu_clk.rate = 320000000;  		break; -	case SYSTEM_CONFIG_CPUCLK_384: +	case RT305X_SYSCFG_CPUCLK_HIGH:  		rt305x_cpu_clk.rate = 384000000;  		break;  	} diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c index a162515c0..60e571179 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c @@ -229,8 +229,8 @@ void __init rt305x_register_wdt(void)  	/* enable WDT reset output on pin SRAM_CS_N */  	t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG); -	t |= SYSTEM_CONFIG_SRAM_CS0_MODE_WDT << -	     SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT; +	t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT << +	     RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT;  	rt305x_sysc_wr(t, SYSC_REG_SYSTEM_CONFIG);  	platform_device_register(&rt305x_wdt_device);  | 
